EDN

ADC conserves FPGA I/O pins

The 16-bit 105-Mample/s LTC2274 ADC features a two-wire serial interface that reduces the number of data I/O lines required between a 16-bit ADC and the FPGA from 16 CMOS or 32 LVDS parallel data ...
EDN

Xilinx develops FPGA-based deserializer for TI’s ADS6000 ADC line

San Jose, Calif. — Xilinx, Inc. has announced the availability of a Virtex-4 FPGA-based deserializer reference design, application note and evaluation module. Developed jointly with Texas Instruments, ...
Design-Reuse

ADC fpga IP Listing

IntelliProp’s SATA Device ADCI core (IPC-SA155A-DT) is an industry standard Serial-ATA (SATA) device interface core that allows companies to build high speed storage devices. The protocol ... The ...
Design-Reuse

Xilinx Announces FPGA-Based Deserializer Solution for TI's ADS60000 ADC Family

SAN JOSE, Calif., April 16, 2007 – Xilinx, Inc. (NASDAQ:XLNX), today announced immediate availability of a Virtex™-4 FPGA-based deserializer reference design, application note and evaluation ...
Electronic Design

New JESD204B Interface Speeds And Simplifies ADC To FPGA Interconnection

Developers in communications and industrial/commercial digital applications often come across problems when implementing the connection between a high-resolution analog-to-digital converter (ADC) and ...
Houston Chronicle

(BW) VMETRO offers Dual Channel 105MHz ADC based on Xilinx Virtex-5 FPGA

VMETRO today announced the PMC-FPGA05-ADC1, a Xilinx, Inc. (NASDAQ:XLNX) Virtex TM-5 LX110 FPGA based PMC module with integrated dual analog input channels. By closely coupling the high-performance ...
Electronic Design

Pair The Right JESD204B Converter With Your FPGA

With more analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) now supporting the latest JESD204B serial interface standard, questions are arising about the best way to ...